گروه کامپیوتر دانشگاه آزاد اسلامی آذرشهر

Half Adder

With the help of half adder, we can design circuits that are capable of performing simple addition with the help of logic gates.

Let us first take a look at the addition of single bits.

0+0 = 0

0+1 = 1

1+0 = 1

1+1 = 10

These are the least possible single-bit combinations. But the result for 1+1 is 10. Though this problem can be solved with the help of an EXOR Gate, if you do care about the output, the sum result must be re-written as a 2-bit output.

Thus the above equations can be written as

0+0 = 00

0+1 = 01

1+0 = 01

1+1 = 10

Here the output ‘1’of ‘10’ becomes the carry-out. The result is shown in a truth-table below. ‘SUM’ is the normal output and ‘CARRY’ is the carry-out.

INPUTS                 OUTPUTS

A             B             SUM      CARRY

0              0              0              0

0              1              1              0

1              0              1              0

1              1              0              1

From the equation it is clear that this 1-bit adder can be easily implemented with the help of EXOR Gate for the output ‘SUM’ and an AND Gate for the carry. Take a look at the implementation below.

For complex addition, there may be cases when you have to add two 8-bit bytes together. This can be done only with the help of full-adder logic.

منابع :

1- سایت آموزش الکترونیکی دانشجویان پلی تکنیک هندوستان http://www.ustudy.in/node/3035

2- سایت مدارات امروز صنعت الکترونیک http://www.circuitstoday.com/half-adder-and-full-adder